As progress is made in functions of a system to which a semiconductor device is applied, functions of high speed and high integration in the semiconductor device have become important to the semiconductor device. Accordingly, the layout method is as important as the circuit design and fabricating in response to the trend of high speed and high integration of the semiconductor device.
Some fabricating techniques for conventional semiconductor device, e.g., the uneven light reflection of the photo process and non-uniformity of the etching process, have brought about variances in process deviations at gates of transistors.
The process deviation depends upon the extent of differences in the length of the gates when measured before and after the photo process. Some process deviation is to be expected and is quite acceptable when it is uniform as among various gates. When it is not substantially uniform, i.e., if there is a great variance in the process deviation, the threshold voltage of the transistors fluctuates, thereby leading to malfunctions of the semiconductor device. In other words, the device may operate differently from what the designer intends it to.
Thus, great efforts have been made to minimize the variances in the process deviations which may occur in the course of manufacturing the semiconductor device.
FIG. 1 is a schematic diagram for explaining problems in the photo masking process, one of the manufacturing processes of a semiconductor device, comprising silicon 10, silicon dioxide 12, aluminum 14, photo resist 16, transparent glass 18, and opaque layer 20.
When the photo process is performed with the photo resist 16 being covered over the aluminum 14, the aluminum 14 does not absorb light, instead, the aluminum reflects light as shown in FIG. 1. Moreover, aluminum 14 is disposed in certain areas with a slant angle of θ, and thus reflects light obliquely on the slant surface, so that a photo pattern is not formed precisely as desired.
However, the layout method of the conventional semiconductor device is to arrange gates without a regular gap between gates. The result is that the slant angle of θ as between gates is not kept constant. As a result, the angle of reflecting light becomes different between gates, despite nearly identical photo masking and etching processes, to bring about a potentially wide variance in process deviations at the gates.
FIG. 2 is a schematic diagram for explaining a problem in the etching process, one of the manufacturing processes of the semiconductor device, comprising silicon 10 silicon dioxide 12 and photo resist 16.
As shown in FIG. 2, etching of the oxide layer through open regions of photo resist 16 produces undercut of silicon dioxide 12, as described by circles that increase in radius to the depth of silicon 10. The greater the radius of the circle, the more deeply the photo resist 16 gets undercut. The extent to which the photo resist 16 may be undercut cannot be known until the photo resist 16 is removed. But the shape of the edge of the oxide layer pattern (as shown with dot lines in FIG. 2) is a good indicator of the degree of undercut. In other words, the etching process is not uniform thereby producing undesirable process deviations. These etching process deviation also vary widely between gates having irregular gaps there between.
Therefore, there is a problem in the layout method of the conventional semiconductor device, in that the gates of transistors conventionally are arranged with irregular gaps. As a result, the gates reflect light differently in the photo process and do not uniformly etch the layer in the etching process, thereby increasing process variances.
In addition, as the layout method of neighboring circuits of the conventional semiconductor device is the same as that of the aforementioned general semiconductor device, the extent of process deviations gets bigger during photo and etching processes.
Especially, a sense amplifier of the semiconductor device is a circuit for amplifying and outputting a very small voltage difference of input signals, so that it is very sensitive. Therefore, it is important to correct differences of threshold voltages of transistors which make up the sense amplifier. However, as the layout method of the conventional sense amplifier is the same as that of the general semiconductor device, variances in the process deviations during the photo and etching processes increases.
In other words, the variance in process deviations of the etching process is added to that of the photo process, thereby increasing overall variances in the fabrication process.
As described above, the problems in those photo and etching processes have already been well known, so that it is necessary to minimize the variances in process deviations because the variances in process deviations caused at the gates during those processes may bring about changes in the threshold voltage of transistors.